Here we will discuss commonly used different System Verilog data types. This is a starting topic for every beginner so it is important to understand. We will understand this topic in detail.
What is Data type and describe different types of System Verilog Datatypes?
A data type is nothing but representing a variable’s value. We need many types of data for generating test bench packets, and also making test benches.
Data types used in Verilog
Verilog has two basic data types reg and wire which are used to store variables and drive the signals respectively. These data types hold four state values which are 0, 1, Z, X. Reg/wire has possible values as below.
Values data type hold | States of signal |
0 | Low level |
1 | High level |
X | Impedance |
Z | Open terminal |
Commonly used System Verilog data types
System Verilog has added many new data types for both design and verification.
Data type | Hold | Size | Syntax | Used for |
Bit | 0/1 | 1 | bit a | to represent a single binary value |
Reg | 0/1/x/z | 1 | reg a | to represent a register, that stores data |
Wire | 0/1/x/z | 1 | wire a | double-precision floating-point values |
Logic | 0, 1, X (unknown), and Z (high impedance) | 1 | logic a | can drive or store values. |
Integer | Signed or unsigned integer values | 32 | integer a | to represent signed or unsigned whole numbers |
Real | double-precision floating point values | 64 | real a | to represent real numbers with decimal points |
Byte | Unsigned byte values | 8 | byte a | to represent a sequence of eight bits. |
Shortint | Signed short integer values | 16 | shortint a | Used for real-time quad-precision floating point |
Int | Signed integer | 32 | Int a | Used for Signed integer |
Longint | Signed long integer | 64 | longint a | Used for Signed long integer |
Time | Unsigned simulation time | 64 | time a | Used for Unsigned simulation time |
Realtime | quad-precision floating point | 128 | realtime a | Used for signed short integer values |
Shortreal | single-precision floating point | 32 | shortreal a | Used for |
In addition to these basic data types, System Verilog also supports arrays, queues, and dynamic arrays, allowing you to work with multiple values of the same type simultaneously. You can also create your own custom data types using structures, unions, and typedefs.
What is the difference between signed and unsigned data types?
Data Type | Description |
bit | Unsigned single bit |
logic | Unsigned multi-bit |
byte | Unsigned byte |
shortint | Signed short integer |
int | Signed integer |
longint | Signed long integer |
integer | Signed or unsigned integer |
time | Unsigned simulation time |
shortreal | single-precision floating point |
real | double-precision floating point |
realtime | quad-precision floating point |
What is the difference between two-state and four-state data types?
The two-state data types are those that can have a value of only 0 or 1 where as the four-state data types can have values 0(Logic Low), 1(Logic High), z(Open terminal), and X(High Impedance).
What is logic data type? Where can we use it?
It is an improved version of reg data types where continuous assignments, gates and modules can drive it. However, it can use to store variables. But it cannot be driven by multiple drivers while modelling a bidirectional bus.
Why are two state data types added in System Verilog?
The two-state data types are used for better test bench performance of test benches and reduced memory usage.